Glossary · from SEC filings
What is high-bandwidth memory (HBM)?
High-bandwidth memory, or HBM, is DRAM stacked in layers and placed right beside an AI accelerator so that data can reach the chip fast enough to keep it busy. Every leading AI accelerator uses it, only three companies make it, and it has turned memory from the most cyclical part of the chip industry into one of AI’s choke points.
What HBM is
Ordinary DRAM sits on memory modules some distance from the processor and talks to it over a relatively narrow connection. HBM stacks several DRAM dies on top of each other, connects them with thousands of vertical links called through-silicon vias, and places the stack on the same package as the processor. The result is far more bandwidth, the rate at which data moves, at lower power.
Micron’s 10-K defines it the same way: a 3D stacked DRAM architecture that uses through-silicon via connections to achieve higher bandwidth while consuming less power than other memory types.
Micron: Micron’s definition of HBM
“A 3D stacked DRAM architecture that utilizes through-silicon via connections for more efficient communication, giving it the ability to achieve a higher bandwidth while consuming less power compared to other memory types.”
Micron 10-K, filed October 9, 2026
Why AI needs it
Training and running large AI models is often limited less by how fast a chip can calculate than by how fast it can be fed. A model’s parameters have to be read from memory over and over, and an accelerator waiting for data is an expensive accelerator doing nothing. HBM is the answer the industry has settled on: each new generation of accelerator carries more HBM stacks with more layers, and the memory has become one of the most expensive parts of the package.
That is why memory makers now describe AI as their main source of growth. Micron’s 10-K says AI and data-centric workloads require significantly increasing quantities of DRAM, including HBM, and that its cloud memory business serves HBM to all data-center customers.
Micron: Micron’s cloud memory unit
“CMBU is focused on memory solutions for large hyperscale cloud customers, and HBM for all data center customers.”
Micron 10-K, filed October 9, 2026
Micron: Micron on AI demand
“Recent technologies, such as generative AI models have emerged, and while they have driven increased demand for HBM and other advanced products in the data center and other markets, the long-term trajectory is unknown and associated demand may fluctuate.”
Micron 10-K, filed October 9, 2026
Who makes it
Three companies make HBM in volume: SK Hynix, Samsung and Micron. Nvidia’s 10-K names exactly those three as its memory suppliers. Only Micron files with the SEC, which makes its 10-K the most detailed public source on the business in English.
Micron reported $133B of revenue over its latest fiscal year, +256%, at a 81% gross margin. Its 10-K says HBM3E 12-high was the majority of its HBM shipments in 2026 and that it expects to ramp HBM4E, its next generation, in calendar 2027. It also attributes the improvement in DRAM margins partly to a higher mix of products such as HBM.
Nvidia: Nvidia’s memory suppliers
“We purchase memory from SK Hynix Inc., Micron Technology, Inc., and Samsung.”
Nvidia 10-K, filed February 25, 2026
Micron: Micron’s HBM shipments
“In 2026, HBM3E 12-high represented the majority of our HBM shipments.”
Micron 10-K, filed October 9, 2026
Micron: Micron’s next HBM
“Development of HBM4E, our next-generation HBM product, is well underway, and we expect to ramp volume in calendar 2027.”
Micron 10-K, filed October 9, 2026
Micron: HBM and DRAM margins
“DRAM margins improved primarily due to increases in average selling prices, an increased mix of higher-margin products, including HBM, and manufacturing cost reductions driven by improvements in product and process technology.”
Micron 10-K, filed October 9, 2026
Why HBM tightens the whole memory market
HBM is hard to make. Each stack combines many dies, each of which has to work, and the packaging is complex. Micron’s 10-K says HBM needs more wafers and more cleanroom space to produce the same number of bits as conventional DRAM. So every wafer a memory maker moves to HBM takes more than its share of capacity away from ordinary DRAM, which tightens supply for PCs, phones and servers too.
The same mechanism works in reverse, and it is the main risk Micron flags. If demand for HBM weakens and suppliers shift capacity back to conventional DRAM, the result could be a significant increase in DRAM supply: the classic memory glut, arriving from the AI side.
Micron: Why HBM uses more wafers
“Due to the higher performance and more complex manufacturing process, HBM requires a higher number of wafers and more cleanroom space to produce the same number of bits as conventional DRAM in the same technology node.”
Micron 10-K, filed October 9, 2026
Micron: The HBM swing risk
“If demand for HBM weakens and suppliers shift capacity from HBM to conventional DRAM, this could result in a significant increase in conventional DRAM supply.”
Micron 10-K, filed October 9, 2026
What HBM has done to Micron’s numbers
Micron’s quarterly results show how quickly the AI demand for memory changed its business. Over its last six reported quarters: Q2 2025 revenue $9.3B at a 38% gross margin; Q3 2025 revenue $11.3B at a 45% gross margin; Q4 2025 revenue $13.6B at a 56% gross margin; Q1 2026 revenue $23.9B at a 74% gross margin; Q2 2026 revenue $41.5B at a 85% gross margin; Q3 2026 revenue $54.2B at a 87% gross margin. Gross margins at those levels are unusual for a memory maker, whose margins have historically swung with the commodity cycle.
Not all of that is HBM. The shortage HBM creates raises prices for ordinary DRAM too, because wafers diverted to HBM aren’t available for other memory. That is why memory makers’ results move together and why the HBM cycle matters even to investors who don’t own a memory company: it shows up in the cost of every server, PC and phone.
HBM generations, briefly
HBM is defined by an industry standard that advances in generations: HBM3, then HBM3E, then HBM4 and HBM4E. Each generation raises the bandwidth per stack, and memory makers also raise capacity by stacking more dies: “12-high” means twelve DRAM dies in one stack. Each step is harder to manufacture, because every die in the stack has to work and the stack has to stay within height and heat limits.
For investors the generations matter because each new accelerator is qualified with specific memory. A memory maker that is late to a generation, or fails a customer’s qualification, can lose share for a full product cycle; one that leads can command better prices. That is why memory makers’ filings describe their roadmaps in such detail.
Who else benefits
HBM’s difficulty also spreads demand down the stack. Stacking and connecting dies requires specialized etch, deposition and packaging equipment, and Lam Research’s 10-K describes AI as a significant driver of equipment spending across both memory and logic. Advanced packaging, which joins the HBM stacks to the processor, has itself become a bottleneck in accelerator supply.
Lam Research: On AI demand
“For example, the growth of AI technologies and related infrastructure has been and is expected to continue to be a significant driver of capital equipment expenditures by semiconductor manufacturers across both the memory and non-memory market segments and requires us to respond (sometimes rapidly) to changes in demand for our products and services, including by expanding our equipment manufacturing capabilities and hiring additional personnel.”
Lam Research 10-K, filed August 7, 2026
How investors read it
Memory has always been a cyclical, commodity business: prices rise in shortages, makers add capacity, and prices fall. HBM has changed the pattern for now, because it is harder to make, sold under longer agreements and qualified for each customer’s accelerator. The question for investors is whether that makes memory a different business or a longer cycle. Gross margin is the number to watch: it shows first when supply catches up.
The memory layer page compares Micron, Sandisk, Western Digital and Seagate on the same terms, and the Micron company page follows its numbers quarter by quarter.
Related terms
More from the glossary: Hyperscaler, Neocloud, Remaining performance obligations (RPO), AI data center, TPU vs GPU, CoWoS (advanced packaging), Vendor financing, and every other term you need to read AI companies’ filings.
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Questions about HBM
What is HBM?
High-bandwidth memory: DRAM dies stacked vertically, connected with through-silicon vias and placed beside a processor to deliver much more bandwidth at lower power than conventional memory.
Why do AI chips use HBM?
Because AI workloads are often limited by how fast data can reach the chip rather than by how fast it calculates. HBM keeps accelerators supplied with data, so each new generation carries more of it.
Who makes HBM?
SK Hynix, Samsung and Micron. Nvidia’s 10-K names those three as its memory suppliers. Of the three, only Micron files with the SEC.
What is the difference between HBM and DRAM?
HBM is a form of DRAM. The difference is packaging: HBM stacks dies vertically and sits on the processor package with a very wide connection, while conventional DRAM sits on separate modules with a narrower one.
Why is HBM in short supply?
It takes more wafers and cleanroom space per bit than conventional DRAM, according to Micron’s 10-K, and only three companies make it. Demand from AI accelerators has grown faster than capacity.
Why are Micron’s margins so high?
Because AI demand for HBM has tightened the whole DRAM market: HBM uses more wafers per bit, which leaves less capacity for ordinary DRAM and lifts its price too. Micron’s 10-K attributes improved DRAM margins to higher prices and a richer mix including HBM.
Can HBM supply catch up with demand?
Memory makers are adding capacity, and Micron’s 10-K describes new cleanroom and packaging projects. It also warns that if HBM demand weakens and capacity shifts back to conventional DRAM, supply could rise sharply.
Does Nvidia make HBM?
No. Nvidia buys it: its 10-K names SK Hynix, Micron and Samsung as memory suppliers. The HBM stacks are packaged alongside Nvidia’s GPU on the same module.
Is HBM the same as GDDR?
No. GDDR is graphics memory placed around a GPU on the board, with a narrower connection. HBM is stacked and placed on the processor package, giving far more bandwidth, which is why AI accelerators use it.
Why does HBM matter to Nvidia investors?
Because it can limit how many accelerators Nvidia can ship and adds to their cost. Only three companies make it, so HBM supply is one of the constraints on the whole AI build-out.
What is HBM4?
The next generation of the standard. Micron’s 10-K says HBM3E 12-high was the majority of its 2026 shipments and that it expects to ramp HBM4E in calendar 2027.
Research and education, not investment advice: nothing here is a recommendation to buy or sell any security. Figures come from companies’ SEC filings as reported; companies named were chosen because they show how the stack works, not as a view on their shares.