What is CoWoS? Advanced packaging for AI chips

What packaging is, and why it became advanced

Making a chip has two big steps. First a foundry etches the circuits onto a silicon wafer; then the wafer is cut into individual dies, which are packaged: mounted, connected to the outside world and protected. For decades packaging was the cheap, low-tech end of the industry, done mostly by outsourced specialists.

AI changed that. An accelerator needs its memory as close as possible, with thousands of connections between them, because moving data is often the bottleneck rather than computing it. Advanced packaging solves this by placing the processor and several HBM stacks on a silicon interposer, a thin layer of silicon with fine wiring, which then sits on a substrate. That is CoWoS: the chip on a wafer (the interposer) on a substrate.

TSMC and CoWoS

TSMC developed CoWoS and is by far the largest provider. Its 20-F lists CoWoS among its 3DFabric advanced packaging and stacking services, alongside SoIC, which stacks chips vertically. TSMC reported $121B of revenue in fiscal 2025, +38%, and makes nearly every leading AI accelerator, so it can offer both steps under one roof.

That combination is part of why TSMC sits at a choke point in the AI stack. An accelerator designer can in principle choose another foundry, but it also needs packaging capacity that matches, and for the most advanced AI chips TSMC has been the main source of both. See the TSMC company page.

• TSMC: TSMC’s packaging services

  “We also offer multiple TSMC 3DFabric advanced silicon stacking and packaging solutions, such as TSMC-SoIC manufacturing services and CoWoS advanced packaging services, to enable homogeneous and heterogeneous chip integration to meet customer requirements for high performance, high compute density and high energy efficiency, low latency, and high integration.”

  TSMC 20-F, filed April 16, 2026

Why packaging capacity limits AI chip supply

Packaging capacity can’t be added quickly. It needs specialized equipment, cleanrooms and expertise, and each new generation of accelerator puts more silicon and more HBM stacks on a larger package, which uses more capacity per chip. When demand for AI accelerators jumped, packaging was one of the first constraints the industry hit.

The memory makers face the same squeeze from the other side. HBM stacks are themselves packaged products, and Micron’s 10-K describes building an HBM advanced packaging facility in Singapore to expand capacity from early 2027, and plans to bring advanced HBM packaging to the United States. Nvidia, for its part, describes paying premiums and deposits and signing long-term agreements to secure supply and capacity.

• Micron: Micron’s HBM packaging plant

  “Singapore: We broke ground in January 2025 on an HBM advanced packaging facility to meaningfully expand our total advanced packaging capacity beginning in early calendar 2027.”

  Micron 10-K, filed October 9, 2026

• Nvidia: How Nvidia secures supply

  “To secure future supply and capacity, we have paid premiums, provided deposits, and entered into long-term supply agreements and capacity commitments, which have increased our product costs and this may continue.”

  Nvidia 10-K, filed February 25, 2026

Who else benefits from advanced packaging

Outsourced packaging and test companies handle much of the rest of the industry’s packaging and some of the advanced work. On our map, ASE, the largest, reported $20.6B of revenue in its latest fiscal year, and Amkor $7.5B over its latest four quarters, +16%. Their growth has been slower than TSMC’s, which suggests the most advanced AI packaging has stayed concentrated at the foundry.

Equipment makers benefit too. ASML, best known for lithography, shipped its first system for advanced packaging in 2025, and Lam Research describes AI as a significant driver of equipment spending. Chip designers such as Broadcom build their custom accelerators around advanced packaging. See the foundry and equipment layer.

• ASML: ASML enters advanced packaging

  “We saw an early result of this focus in 2025, when we shipped the first i-line system supporting advanced packaging, the TWINSCAN XT:260.”

  ASML 20-F, filed February 25, 2026

• Broadcom: Broadcom’s custom silicon

  “Our custom silicon solutions provide the platform to integrate embedded logic, high-bandwidth memory, serializer/deserializer technology, IP cores and processor cores using advanced packaging technologies.”

  Broadcom 10-K, filed December 18, 2025

The packaging vocabulary, briefly

An interposer is the thin slice of silicon with very fine wiring that the processor and memory sit on side by side; it is what lets them have thousands of connections rather than hundreds. The substrate underneath connects the whole package to the circuit board. Putting chips side by side on an interposer is often called 2.5D packaging; stacking them directly on top of each other, as TSMC’s SoIC does and as HBM itself does with memory dies, is 3D packaging.

Chiplets are the reason all of this matters more each year. Instead of one very large chip, designers increasingly split a processor into several smaller dies made separately and joined in the package. Smaller dies are cheaper to make with good yields, and different parts can use different manufacturing processes. The cost is that the package becomes far more complex, and the companies that can join chiplets reliably at volume gain bargaining power.

What the supply commitments say

The clearest evidence of how tight advanced manufacturing and packaging capacity has been is in what buyers commit to secure it. Nvidia’s supply and capacity commitments rose from $119 billion to $279 billion in a single quarter, and its 10-K describes premiums, deposits and long-term agreements to lock in supply. Not all of that is packaging, but packaging is part of what an accelerator maker has to reserve years ahead.

Commitments like these cut both ways. They show that suppliers can sell everything they can make for years, which supports their pricing. They also mean that if demand for a particular product falls, the buyer is left holding commitments it can’t use, as Nvidia was with its H20 chip, for which it took a $4.5 billion charge.

• Nvidia: $279B of supply and capacity commitments

  “We have significantly increased our supply and capacity commitments from $119 billion last quarter to $279 billion as of July 26, 2026 to meet future demand.”

  Nvidia 10-Q, filed August 26, 2026

• Nvidia: The H20 charge

  “As a result of these requirements, we incurred a $4.5 billion charge in the first quarter of fiscal year 2026 associated with H20 for excess inventory and purchase obligations, as the demand for H20 products diminished.”

  Nvidia 10-K, filed February 25, 2026

What to watch

Packaging is easy to overlook because it rarely gets its own line in financial statements. The clues are in the text: foundries and memory makers announcing new packaging plants, equipment makers describing packaging orders, and accelerator makers describing supply constraints and the commitments they sign to secure capacity. When those commitments grow much faster than revenue, buyers are reserving capacity for demand they expect.

For investors, the useful signals are indirect. A foundry or memory maker announcing a new packaging plant is telling you it expects demand to outrun current capacity for years; an accelerator maker describing larger prepayments and capacity commitments is telling you the same from the buyer’s side. When those announcements slow, or commitments start to shrink, the scarcity is easing.

If packaging capacity catches up with demand, the scarcity premium in AI chips would ease, which would show first in prices and margins. If it stays tight, the companies that own the capacity keep their position. Either way, it is one of the few parts of the stack where a single company, TSMC, holds most of the advanced capacity.

Related terms

More from the glossary: Hyperscaler, Neocloud, High-bandwidth memory (HBM), Remaining performance obligations (RPO), AI data center, TPU vs GPU, Vendor financing, and every other term you need to read AI companies’ filings.